? AUIRF1404 v dss 40v r ds(on) typ. 3.5m ?? max. 4.0m ?? i d (silicon limited) 202a ? i d (package limited) 160a features ? advanced planar technology ? low on-resistance ? dynamic dv/dt rating ? 175c operating temperature ? fast switching ? fully avalanche rated ? repetitive avalanche allowed up to tjmax ? lead-free, rohs compliant ? automotive qualified * description specifically designed for automotive applications, this stripe planar design of hexfet ? power mosfets utilizes the latest processing techniques to achiev e low on-resistan ce per silicon area. this benefit combined with the fast switching speed and ruggedized device design that hexfet ? power mosfets are well known for, provides the designer with an extremely efficient and reliable device for use in automotive and a wide variety of other applications. 1 2015-9-30 hexfet? is a registered trademark of infineon. * qualification standards can be found at www.infineon.com ? automotive grade symbol parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v (silicon limited) 202 ? a i d @ t c = 100c continuous drain current, v gs @ 10v (silicon limited) 143 i d @ t c = 25c continuous drain current, v gs @ 10v (package limited) 160 i dm pulsed drain current ? 808 p d @t c = 25c maximum power dissipation 333 w linear derating factor 2.2 w/c v gs gate-to-source voltage 20 v e as single pulse avalanche energy (thermally limited) ? 620 mj i ar avalanche current ? see fig.15,16, 12a, 12b a e ar repetitive avalanche energy ? mj t j operating junction and -55 to + 175 ? t stg storage temperature range c ? soldering temperature, for 10 seconds (1.6mm from case) 300 ? mounting torque, 6-32 or m3 screw 10 lbf?in (1.1n?m) ? dv/dt peak diode recovery dv/dt ? 1.5 v/ns absolute maximum ratings stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress ratings only; and functional operation of the device at these or any other condition beyond thos e indicated in the specificatio ns is not implied. exposure to absolute-maximum-rated conditions for exte nded periods may affect device reliability. the thermal resistan ce and power dissipation ratings are measured under board mounted and still air conditions. ambient temperature (ta) is 25c, unle ss otherwise specified. thermal resistance ? symbol parameter typ. max. units r ? jc junction-to-case ? ??? 0.45 c/w r ? cs case-to-sink, flat, greased surface 0.50 ??? r ? ja junction-to-ambient ??? 62 to-220ab AUIRF1404 s d g base part number package type standard pack form quantity AUIRF1404 to-220 tube 50 AUIRF1404 orderable part number g d s gate drain source
? AUIRF1404 2 2015-9-30 notes: ? ? repetitive rati ng; pulse width limited by max. junction temperature. (see fig. 11) ? starting t j = 25c, l = 85 ? h, r g = 25 ? , i as = 121a, v gs =10v. (see fig. 12) ? i sd ?? 121a, di/dt ?? 130a/s, v dd ?? v (br)dss , t j ? 175c. ? pulse width ?? 400s; duty cycle ? 2%. ? c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss . ? calculated continuous current based on maximum allowable junction temperature. bond wire current limit is 160a. ? r ? is measured at t j of approximately 90c. static @ t j = 25c (unless otherwise specified) parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage 40 ??? ??? v v gs = 0v, i d = 250a ? v (br)dss / ? t j breakdown voltage temp. coefficient ??? 0.039 ??? v/c reference to 25c, i d = 1ma r ds(on) static drain-to-source on-resistance ??? 3.5 4.0 m ??? v gs = 10v, i d = 121a ? v gs(th) gate threshold voltage 2.0 ??? 4.0 v v ds = v gs , i d = 250a gfs forward trans conductance 76 ??? ??? s v ds = 25v, i d = 121a i dss drain-to-source leakage current ??? ??? 20 a v ds =40 v, v gs = 0v ??? ??? 250 v ds =32v,v gs = 0v,t j =150c i gss gate-to-source forward leakage ??? ??? 100 na v gs = 20v gate-to-source reverse leakage ??? ??? -100 v gs = -20v dynamic electrical characteristics @ t j = 25c (unless otherwise specified) q g total gate charge ??? 131 196 nc ? i d = 121a q gs gate-to-source charge ??? 36 ??? v ds = 32v q gd gate-to-drain charge ??? 37 56 v gs = 10v ? t d(on) turn-on delay time ??? 17 ??? ns v dd = 20v t r rise time ??? 190 ??? i d = 121a t d(off) turn-off delay time ??? 46 ??? r g = 2.5 ?? t f fall time ??? 33 ??? r d = 0.2 ?? l d internal drain inductance ??? 4.5 ??? nh ? between lead, 6mm (0.25in.) l s internal source inductance ??? 7.5 ??? from package and center of die contact c iss input capacitance ??? 5669 ??? pf ? v gs = 0v c oss output capacitance ??? 1659 ??? v ds = 25v c rss reverse transfer capacitance ??? 223 ??? ? = 1.0mhz, see fig. 5 c oss output capacitance ??? 6205 ??? v gs = 0v, v ds = 1.0v ? = 1.0mhz c oss output capacitance ??? 1467 ??? v gs = 0v, v ds = 32v ? = 1.0mhz c oss eff. effective output capacitance ??? 2249 ??? v gs = 0v, v ds = 0v to 32v diode characteristics ? parameter min. typ. max. units conditions i s continuous source current ??? ??? 202 ? a mosfet symbol (body diode) showing the i sm pulsed source current ??? ??? 808 integral reverse (body diode) ??? p-n junction diode. v sd diode forward voltage ??? ??? 1.5 v t j = 25c,i s = 121a,v gs = 0v ?? t rr reverse recovery time ??? 78 117 ns t j = 25c ,i f = 121a q rr reverse recovery charge ??? 163 245 nc di/dt = 100a/s ??? t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d )
? AUIRF1404 3 2015-9-30 fig. 2 typical output characteristics fig. 3 typical transfer characteristics fig. 4 normalized on-resistance vs. temperature fig. 1 typical output characteristics 1 10 100 1000 0.1 1 10 100 20s pulse width t = 25 c j top bottom vgs 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v 4.5v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 4.5v 1 10 100 1000 0.1 1 10 100 20s pulse width t = 175 c j top bottom vgs 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v 4.5v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 4.5v 10 100 1000 4 5 6 7 8 9 10 11 12 v = 25v 20s pulse width ds v , gate-to-source voltage (v) i , drain-to-source current (a) gs d t = 25 c j t = 175 c j -60 -40 -20 0 20 40 60 80 100 120 140 160 180 0.0 0.5 1.0 1.5 2.0 2.5 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 10v 202a
? AUIRF1404 4 2015-9-30 fig 5. typical capacitance vs. drain-to-source voltage fig 6. typical gate charge vs. gate-to-source voltage ? fig 8. maximum safe operating area fig. 7 typical source-to-drain diode forward voltage 1 10 100 v ds , drain-to-source voltage (v) 0 2000 4000 6000 8000 10000 c , c a p a c i t a n c e ( p f ) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 0 50 100 150 200 0 4 8 12 16 20 q , total gate charge (nc) v , gate-to-source voltage (v) g gs for test circui t see figure i = d 13 121a v = 20v ds v = 32v ds 0.1 1 10 100 1000 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 v ,source-to-drain voltage (v) i , reverse drain current (a) sd sd v = 0 v gs t = 25 c j t = 175 c j 1 10 100 1000 10000 1 10 100 operation in this area limited by r ds(on) single pulse t t = 175 c = 25 c j c v , drain-to-source voltage (v) i , drain current (a) i , drain current (a) ds d 10us 100us 1ms 10ms
? AUIRF1404 5 2015-9-30 fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature fig 10a. switching time test circuit fig 10b. switching time waveforms 25 50 75 100 125 150 175 t c , case temperature (c) 0 50 100 150 200 250 i d , d r a i n c u r r e n t ( a ) limited by package 0.001 0.01 0.1 1 0.00001 0.0001 0.001 0.01 0.1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response)
? AUIRF1404 6 2015-9-30 ? fig 14. threshold voltage vs. temperature fig 12c. maximum avalanche energy vs. drain current fig 12a. unclamped inductive test circuit fig 12b. unclamped inductive waveforms r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v t p v (br)dss i as fig 13b. gate charge test circuit fig 13a. gate charge waveform vds vgs id vgs(th) qgs1 qgs2 qgd qgodr 25 50 75 100 125 150 175 0 300 600 900 1200 1500 starting t , junction temperature ( c) e , single pulse avalanche energy (mj) j as i d top bottom 49a 101a 121a -75 -50 -25 0 25 50 75 100 125 150 t j , temperature ( c ) 1.0 2.0 3.0 4.0 - v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = -250a ?
? AUIRF1404 7 2015-9-30 ? fig 15. typical avalanche current vs. pulse width notes on repetitive avalanche curves , figures 15, 16: (for further info, see an-1005 at www.infineon.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type. 2. safe operation in avalanc he is allowed as long as t jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 12a, 12b. 4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. ? t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 15, 16). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figures 13) p d (ave) = 1/2 ( 1.3bvi av ) = ? t/ z thjc i av = 2 ? t/ [1.3bvz th ] e as (ar) = p d (ave) t av fig 16. maximum avalanche energy vs. temperature 1.0e-08 1.0e-07 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 tav (sec) 1 10 100 1000 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav assuming ? tj = 25c due to avalanche losses 0.01 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 50 100 150 200 250 300 350 400 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 10% duty cycle i d = 121a
? AUIRF1404 8 2015-9-30 ? fig 17. peak diode recovery dv/dt test circuit for n-channel hexfet? power mosfets
? AUIRF1404 9 2015-9-30 ? to-220ab package is not recommended for surface mount application. to-220ab part marking information ywwa xx ? xx date code y= year ww= work week auf1404 lot code part number ir logo to-220ab package outline (dimensions are shown in millimeters (inches))
? AUIRF1404 10 2015-9-30 ? qualification information qualification level automotive (per aec-q101) comments: this part number(s) passed automotive qualification. infineon?s industrial and consumer qualification level is granted by extension of the higher automotive level. moisture sensitivity level to-220ab n/a esd machine model class m4 (+/- 425v) ? aec-q101-002 human body model ? class h2 (+/- 4000v) ? aec-q101-001 charged device model class c5 (+/- 1125v) ? aec-q101-005 rohs compliant yes published by infineon technologies ag 81726 mnchen, germany ? infineon technologies ag 2015 all rights reserved. important notice the information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (?beschaffenheitsgarantie?). with respect to any examples , hints or any typical values stated herein and/or any information regarding the application of the product, infineon technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any thi rd party. in addition, any information given in this document is subject to customer?s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer ?s products and any use of the product of infineon technologies in customer?s applications. the data contained in this document is exclusively intended for technically trai ned staff. it is the responsibility of customer?s technical departments to evaluate the suit ability of the product for the intended application and the completeness of the product information given in this document with respect to such application. for further information on the product, technology, delivery terms and conditions and prices please contact your nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements products may contain danger ous substances. for information on the types in question please contact your nearest infineon technologies office. except as otherwise explicitly appr oved by infineon technologies in a written document signed by authorized representatives of infineon technologies, infineon technolog ies? products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. revision history date comments 9/30/2015 ?? updated datasheet with corporate template. ?? corrected typo on idss test condition on page 2. ?? updated package outline on page 9. ? highest passing voltage.
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